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IEEE Standard for Information Technology - Telecommunications and Information Exchange Between Systems – LAN/MAN - Specific Requirements Part 3: CSMA/CD Access Method and Physical Layer Specifications - Amendment: Physical Layer and Management Parameter, 2006
- 1. Introduction [Go to Page]
- 1.3 Normative references
- 1.4 Definitions
- 1.5 Abbreviations
- Title Page
- Abstract/Keywords
- Introduction
- Notice to users [Go to Page]
- Errata
- Interpretations
- Downloads
- Participants
- CONTENTS
- Editing instructions
- 1. Introduction [Go to Page]
- 1.3 Normative references
- 1.4 Definitions
- 1.5 Abbreviations
- 28. Physical Layer link signaling for 10 Mb/s, 100 Mb/s, and 1000 Mb/s Auto- Negotiation on twisted pair [Go to Page]
- 28.2 Functional specifications [Go to Page]
- 28.2.1.1.1 FLP burst encoding
- 28.2.1.1.2 Transmit timing
- 28.2.1.2 Link Codeword encoding [Go to Page]
- 28.2.1.2.2 Technology Ability Field
- 28.2.1.2.3 Extended Next Page
- 28.2.2.1 FLP Burst ability detection and decoding
- 28.2.3.4 Next Page function [Go to Page]
- 28.2.3.4.2 Extended Next Page encodings
- 28.2.3.4.12 Extended Unformatted Code Field
- 28.2.3.4.13 Use of Next Pages
- 28.2.4.1.3 Auto-Negotiation advertisement register (Register 4) (R/W)
- 28.2.4.1.4 Auto-Negotiation link partner ability register (Register 5) (RO)
- 28.2.4.1.8 State diagram variable to MII register mapping
- 28.3 State diagrams and variable definitions [Go to Page]
- 28.3.1 State diagram variables
- 28.3.2 State diagram timers
- 28.3.3 State diagram counters
- 28.3.4 State diagrams
- 28.5 Protocol implementation conformance statement (PICS) proforma for Clause 28, Physical Layer link signaling for 10 Mb/s, 100 Mb/s, and 1000 Mb/s Auto- Negotiation on twisted pair [Go to Page]
- 28.5.1 Introduction
- 28.5.3 Major capabilities/options
- 28.5.4 PICS proforma tables for Physical Layer link signaling for 10 Mb/s, 100 Mb/s, and 1000 Mb/s, Auto-Negotiation on twisted pair [Go to Page]
- 28.5.4.2 Auto-Negotiation functions
- 28.5.4.3 Transmit function requirements
- 28.5.4.5 Arbitration functions
- 28.5.4.8 State diagrams
- 28.5.4.10 Auto-Negotiation annexes
- 30. Management [Go to Page]
- 30.2.5 Capabilities [Go to Page]
- Table 30-1e- Capabilities
- 30.3.2.1.2 aPhyType
- 30.3.2.1.3 aPhyTypeList
- 30.5.1.1.2 aMAUType
- 30.5.1.1.17 aSNROpMarginChnlA
- 30.5.1.1.18 aSNROpMarginChnlB
- 30.5.1.1.19 aSNROpMarginChnlC
- 30.5.1.1.20 aSNROpMarginChnlD
- 30.6.1.1.5 aAutoNegLocalTechnologyAbility
- 44. Introduction to 10 Gb/s baseband network [Go to Page]
- 44.1 Overview [Go to Page]
- 44.1.1 Scope
- 44.1.2 Objectives
- 44.1.3 Relationship of 10 Gigabit Ethernet to the ISO OSI reference model
- 44.1.4 Summary of 10 Gigabit Ethernet sublayers [Go to Page]
- 44.1.4.1 Reconciliation Sublayer (RS) and 10 Gigabit Media Independent Interface (XGMII)
- 44.1.4.4 Physical Layer signaling systems
- 44.3 Delay constraints
- 44.4 Protocol implementation conformance statement (PICS) proforma
- 44.5 Relation of 10 Gigabit Ethernet to other standards
- 45. Management Data Input/Output (MDIO) Interface [Go to Page]
- 45.2 MDIO Interface Registers [Go to Page]
- 45.2.1 PMA/PMD registers [Go to Page]
- 45.2.1.1 PMA/PMD control 1 register (Register 1.0)
- 45.2.1.4 PMA/PMD speed ability (Register 1.4) [Go to Page]
- 45.2.1.4.1 10M capable (1.4.6)
- 45.2.1.4.2 100M capable (1.4.5)
- 45.2.1.4.3 1000M capable (1.4.4)
- 45.2.1.6 10G PMA/PMD control 2 register (Register 1.7) [Go to Page]
- 45.2.1.6.1 PMA/PMD type selection (1.7.32:0)
- 45.2.1.7 10G PMA/PMD status 2 register (Register 1.8) [Go to Page]
- 45.2.1.7.4 Transmit fault (1.8.11)
- 45.2.1.7.5 Receive fault (1.8.10)
- 45.2.1.8 10G PMA/PMD transmit disable register (Register 1.9)
- 45.2.1.10 10G PMA/PMD extended ability register (Register 1.11) [Go to Page]
- 45.2.1.10.1 10BASE-T ability (1.11.8)
- 45.2.1.10.2 100BASE-TX ability (1.11.7)
- 45.2.1.10.3 1000BASE-T ability (1.11.5)
- 45.2.1.10.4 10GBASE-T ability (1.11.2)
- 45.2.1.10.5 10GBASE-CX4 ability (1.11.0)
- 45.2.1.59 10GBASE-T status (Register 1.129) [Go to Page]
- 45.2.1.59.1 LP information valid (1.129.0)
- 45.2.1.60 10GBASE-T pair swap and polarity register (Register 1.130) [Go to Page]
- 45.2.1.60.1 Pair D polarity (1.130.11)
- 45.2.1.60.2 Pair C polarity (1.130.10)
- 45.2.1.60.3 Pair B polarity (1.130.9)
- 45.2.1.60.4 Pair A polarity (1.130.8)
- 45.2.1.60.5 MDI/MDI-X connection (1.130.1:0)
- 45.2.1.61 10GBASE-T TX power backoff and PHY short reach setting (Register 1.131) [Go to Page]
- 45.2.1.61.1 10GBASE-T TX power backoff settings (1.131.15:10)
- 45.2.1.61.2 PHY short reach mode (1.131.0)
- 45.2.1.62 10GBASE-T test mode register (Register 1.132) [Go to Page]
- 45.2.1.62.1 Test mode control (1.132.15:13)
- 45.2.1.62.2 Transmitter test frequencies (1.132.12:10)
- 45.2.1.63 SNR operating margin channel A register (Register 1.133)
- 45.2.1.64 SNR operating margin channel B register (Register 1.134)
- 45.2.1.65 SNR operating margin channel C register (Register 1.135)
- 45.2.1.66 SNR operating margin channel D register (Register 1.136)
- 45.2.1.67 Minimum margin channel A register (Register 1.137)
- 45.2.1.68 Minimum margin channel B register (Register 1.138)
- 45.2.1.69 Minimum margin channel C register (Register 1.139)
- 45.2.1.70 Minimum margin channel D register (Register 1.140)
- 45.2.1.71 RX signal power channel A register (Register 1.141)
- 45.2.1.72 RX signal power channel B register (Register 1.142)
- 45.2.1.73 RX signal power channel C register (Register 1.143)
- 45.2.1.74 RX signal power channel D register (Register 1.144)
- 45.2.1.75 10GBASE-T skew delay register (Registers 1.145 and 1.146)
- 45.2.3 PCS registers [Go to Page]
- 45.2.3.1.2 Loopback (3.0.14)
- 45.2.3.2.2 PCS receive link status (3.1.2)
- 45.2.3.6 10G PCS control 2 register (Register 3.7) [Go to Page]
- 45.2.3.6.1 PCS type selection (3.7.1:0)
- 45.2.3.7 10G PCS status 2 register (Register 3.8) [Go to Page]
- 45.2.3.7.4 10GBASE-T capable (3.8.3)
- 45.2.3.11 10GBASE-R and 10GBASE-T PCS status 1 register (Register 3.32) [Go to Page]
- 45.2.3.11.1 10GBASE-R and 10GBASE-T PCS receive link status (3.32.12)
- 45.2.3.11.3 10GBASE-R and 10GBASE-T PCS high BER (3.32.1)
- 45.2.3.11.4 10GBASE-R and 10GBASE-T PCS block lock (3.32.0)
- 45.2.3.12 10GBASE-R and 10GBASE-T PCS status 2 register (Register 3.33) [Go to Page]
- 45.2.3.12.1 Latched block lock (3.33.15)
- 45.2.3.12.2 Latched high BER (3.33.14)
- 45.2.3.12.3 BER (3.33.13:8)
- 45.2.3.12.4 Errored blocks (3.33.7:0)
- 45.2.7 Auto-Negotiation registers [Go to Page]
- 45.2.7.1 AN control register (Register 7.0) [Go to Page]
- 45.2.7.1.1 AN reset (7.0.15)
- 45.2.7.1.2 Extended Next Page control (7.0.13)
- 45.2.7.1.3 Auto-Negotiation enable (7.0.12)
- 45.2.7.1.4 Restart Auto-Negotiation (7.0.9)
- 45.2.7.2 AN status (Register 7.1) [Go to Page]
- 45.2.7.2.1 Extended next page status (7.1.7)
- 45.2.7.2.2 Page received (7.1.6)
- 45.2.7.2.3 Auto-Negotiation complete (7.1.5)
- 45.2.7.2.4 Remote fault (7.1.4)
- 45.2.7.2.5 Auto-Negotiation ability (7.1.3)
- 45.2.7.2.6 Link status (7.1.2)
- 45.2.7.2.7 Link partner Auto-Negotiation ability (7.1.0)
- 45.2.7.3 Auto-Negotiation device identifier (Registers 7.2 and 7.3)
- 45.2.7.4 AN devices in package (Registers 7.5 and 7.6)
- 45.2.7.5 AN package identifier (Registers 7.14 and 7.15)
- 45.2.7.6 AN advertisement register (7.16, 7.17, and 7.18)
- 45.2.7.7 AN LP base page ability register (7.19, 7.20, and 7.21) [Go to Page]
- 45.2.7.7.1 Extended next page (7.19.12)
- 45.2.7.8 AN XNP transmit register (7.22, 7.23, and 7.24)
- 45.2.7.9 AN LP XNP ability register (7.25, 7.26, and 7.27)
- 45.2.7.10 10GBASE-T AN control register (Register 7.32) [Go to Page]
- 45.2.7.10.1 MASTER-SLAVE manual config enable (7.32.15)
- 45.2.7.10.2 MASTER-SLAVE config value (7.32.14)
- 45.2.7.10.3 Port type (7.32.13)
- 45.2.7.10.4 10GBASE-T capability (7.32.12)
- 45.2.7.10.5 LD PMA training reset request (7.32.2)
- 45.2.7.10.6 LD loop timing ability (7.32.0)
- 45.2.7.11 10GBASE-T AN status register (Register 7.33) [Go to Page]
- 45.2.7.11.1 MASTER-SLAVE configuration fault (7.33.15)
- 45.2.7.11.2 MASTER-SLAVE configuration resolution (7.33.14)
- 45.2.7.11.3 Local receiver status (7.33.13)
- 45.2.7.11.4 Remote receiver status (7.33.12)
- 45.2.7.11.5 Link partner 10GBASE-T capability (7.33.11)
- 45.2.7.11.6 Link partner loop timing ability (7.33.10)
- 45.2.7.11.7 Link partner PMA training reset request (7.33.9)
- 45.5 Protocol implementation conformance statement (PICS) proforma for Clause 45, MDIO interface [Go to Page]
- 45.5.2.3 Major capabilities/options
- 45.5.3 PICS proforma tables for the Management Data Input Output (MDIO) interface [Go to Page]
- 45.5.3.2 PMA/PMD MMD options
- 45.5.3.3 PMA/PMD management functions
- 45.5.3.6 PCS options
- 45.5.3.7 PCS management functions
- 45.5.3.8 Auto-Negotiation options
- 45.5.3.9 Auto-Negotiation management functions
- Annex A (informative) Bibliography
- Annex 28B (normative) IEEE 802.3 Selector Base Page definition
- Annex 28C (normative) Next Page Message Code Field definitions
- Annex 28D (normative) Description of extensions to Clause 28 and associated annexes
- Annex 30A (normative) GDMO specification for IEEE 802.3 managed object classes
- Annex 30B (normative) GDMO and ASN.1 definitions for management
- 55. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10GBASE-T [Go to Page]
- 55.1 Overview [Go to Page]
- 55.1.1 Objectives
- 55.1.2 Relationship of 10GBASE-T to other standards
- 55.1.3 Operation of 10GBASE-T [Go to Page]
- 55.1.3.1 Physical Coding Sublayer (PCS)
- 55.1.3.2 Physical Medium Attachment (PMA) sublayer
- 55.1.4 Signaling
- 55.1.5 Interfaces
- 55.1.6 Conventions in this clause
- 55.2 10GBASE-T service primitives and interfaces [Go to Page]
- 55.2.1 Technology Dependent Interface [Go to Page]
- 55.2.1.1 PMA_LINK.request [Go to Page]
- 55.2.1.1.1 Semantics of the primitive
- 55.2.1.1.2 When generated
- 55.2.1.1.3 Effect of receipt
- 55.2.1.2 PMA_LINK.indication [Go to Page]
- 55.2.1.2.1 Semantics of the primitive
- 55.2.1.2.2 When generated
- 55.2.1.2.3 Effect of receipt
- 55.2.2 PMA service interface [Go to Page]
- 55.2.2.1 PMA_TXMODE.indication [Go to Page]
- 55.2.2.1.1 Semantics of the primitive
- 55.2.2.1.2 When generated
- 55.2.2.1.3 Effect of receipt
- 55.2.2.2 PMA_CONFIG.indication [Go to Page]
- 55.2.2.2.1 Semantics of the primitive
- 55.2.2.2.2 When generated
- 55.2.2.2.3 Effect of receipt
- 55.2.2.3 PMA_UNITDATA.request [Go to Page]
- 55.2.2.3.1 Semantics of the primitive
- 55.2.2.3.2 When generated
- 55.2.2.3.3 Effect of receipt
- 55.2.2.4 PMA_UNITDATA.indication [Go to Page]
- 55.2.2.4.1 Semantics of the primitive
- 55.2.2.4.2 When generated
- 55.2.2.4.3 Effect of receipt
- 55.2.2.5 PMA_SCRSTATUS.request [Go to Page]
- 55.2.2.5.1 Semantics of the primitive
- 55.2.2.5.2 When generated
- 55.2.2.5.3 Effect of receipt
- 55.2.2.6 PMA_PCSSTATUS.request [Go to Page]
- 55.2.2.6.1 Semantics of the primitive
- 55.2.2.6.2 When generated
- 55.2.2.6.3 Effect of receipt
- 55.2.2.7 PMA_RXSTATUS.indication [Go to Page]
- 55.2.2.7.1 Semantics of the primitive
- 55.2.2.7.2 When generated
- 55.2.2.7.3 Effect of receipt
- 55.2.2.8 PMA_REMRXSTATUS.request [Go to Page]
- 55.2.2.8.1 Semantics of the primitive
- 55.2.2.8.2 When generated
- 55.2.2.8.3 Effect of receipt
- 55.3 Physical Coding Sublayer (PCS) [Go to Page]
- 55.3.1 PCS service interface (XGMII)
- 55.3.2 PCS functions [Go to Page]
- 55.3.2.1 PCS Reset function
- 55.3.2.2 PCS Transmit function [Go to Page]
- 55.3.2.2.1 Use of blocks
- 55.3.2.2.2 65B-LDPC transmission code
- 55.3.2.2.3 Notation conventions
- 55.3.2.2.4 Transmission order
- 55.3.2.2.5 Block structure
- 55.3.2.2.6 Control codes
- 55.3.2.2.7 Ordered sets
- 55.3.2.2.8 Valid and invalid blocks
- 55.3.2.2.9 Idle (/I/)
- 55.3.2.2.10 Start (/S/)
- 55.3.2.2.11 Terminate (/T/)
- 55.3.2.2.12 ordered_set (/O/)
- 55.3.2.2.13 Error (/E/)
- 55.3.2.2.14 Transmit process
- 55.3.2.2.15 PCS scrambler.
- 55.3.2.2.16 CRC8
- 55.3.2.2.17 LDPC encoder
- 55.3.2.2.18 DSQ128 bit mapping
- 55.3.2.2.19 DSQ128 to 4D-PAM16
- 55.3.2.2.20 65B-LDPC framer
- 55.3.2.3 PCS Receive function [Go to Page]
- 55.3.2.3.1 Frame and block synchronization
- 55.3.2.3.2 PCS descrambler
- 55.3.2.3.3 CRC8 receive function
- 55.3.3 Test-pattern generators
- 55.3.4 PMA training side-stream scrambler polynomials [Go to Page]
- 55.3.4.1 Generation of bits San, Sbn, Scn, Sdn
- 55.3.4.2 Generation of 4D symbols TAn, TBn, TCn, TDn
- 55.3.4.3 PMA training mode descrambler polynomials
- 55.3.5 Detailed functions and state diagrams [Go to Page]
- 55.3.5.1 State diagram conventions
- 55.3.5.2 State diagram parameters [Go to Page]
- 55.3.5.2.1 Constants
- 55.3.5.2.2 Variables
- 55.3.5.2.3 Timers
- 55.3.5.2.4 Functions
- 55.3.5.2.5 Counters
- 55.3.5.3 Messages
- 55.3.5.4 State diagrams
- 55.3.6 PCS management [Go to Page]
- 55.3.6.1 Status
- 55.3.6.2 Counters
- 55.3.6.3 Loopback
- 55.4 Physical Medium Attachment (PMA) sublayer [Go to Page]
- 55.4.1 PMA functional specifications
- 55.4.2 PMA functions [Go to Page]
- 55.4.2.1 PMA Reset function
- 55.4.2.2 PMA Transmit function
- 55.4.2.3 PMA transmit disable function [Go to Page]
- 55.4.2.3.1 Global PMA transmit disable function
- 55.4.2.3.2 PMA pair by pair transmit disable function
- 55.4.2.3.3 PMA MDIO function mapping
- 55.4.2.4 PMA Receive function
- 55.4.2.5 PHY Control function [Go to Page]
- 55.4.2.5.1 Infofield notation
- 55.4.2.5.2 Start of Frame Delimiter
- 55.4.2.5.3 Current transmitter settings
- 55.4.2.5.4 Next transmitter settings
- 55.4.2.5.5 Requested transmitter settings
- 55.4.2.5.6 Message Field
- 55.4.2.5.7 SNR_margin
- 55.4.2.5.8 Transition counter
- 55.4.2.5.9 Coefficient exchange handshake
- 55.4.2.5.10 Reserved Fields
- 55.4.2.5.11 Vendor specific field
- 55.4.2.5.12 Coefficient Field
- 55.4.2.5.13 CRC16
- 55.4.2.5.14 Startup sequence
- 55.4.2.6 Link Monitor function
- 55.4.2.7 Clock Recovery function
- 55.4.3 MDI [Go to Page]
- 55.4.3.1 MDI signals transmitted by the PHY
- 55.4.3.2 Signals received at the MDI
- 55.4.4 Automatic MDI/MDI-X configuration
- 55.4.5 State variables [Go to Page]
- 55.4.5.1 State diagram variables
- 55.4.5.2 Timers
- 55.4.5.3 Functions
- 55.4.6 State diagrams [Go to Page]
- 55.4.6.1 PHY Control state diagram
- 55.4.6.2 Transition counter state diagrams
- 55.4.6.3 Link Monitor state diagram
- 55.5 PMA electrical specifications [Go to Page]
- 55.5.1 Isolation requirement
- 55.5.2 Test modes [Go to Page]
- 55.5.2.1 Test fixtures
- 55.5.3 Transmitter electrical specifications [Go to Page]
- 55.5.3.1 Maximum output droop
- 55.5.3.2 Transmitter linearity.
- 55.5.3.3 Transmitter timing jitter
- 55.5.3.4 Transmitter power spectral density (PSD) and power level
- 55.5.3.5 Transmit clock frequency
- 55.5.4 Receiver electrical specifications [Go to Page]
- 55.5.4.1 Receiver differential input signals
- 55.5.4.2 Receiver frequency tolerance
- 55.5.4.3 Common-mode noise rejection
- 55.5.4.4 Alien crosstalk noise rejection
- 55.5.4.5 Short reach mode link test [Go to Page]
- 55.5.4.5.1 Short reach test channels
- 55.6 Management interfaces [Go to Page]
- 55.6.1 Support for Auto-Negotiation [Go to Page]
- 55.6.1.1 10GBASE-T use of registers during Auto-Negotiation
- 55.6.1.2 10GBASE-T Auto-Negotiation page use
- 55.6.1.3 Sending Next Pages
- 55.6.2 MASTER-SLAVE configuration resolution
- 55.7 Link segment characteristics [Go to Page]
- 55.7.1 Cabling system characteristics
- 55.7.2 Link segment transmission parameters [Go to Page]
- 55.7.2.1 Insertion loss
- 55.7.2.2 Differential characteristic impedance
- 55.7.2.3 Return loss
- 55.7.2.4 Coupling parameters between duplex channels comprising one link segment [Go to Page]
- 55.7.2.4.1 Differential near-end crosstalk
- 55.7.2.4.2 Multiple disturber near-end crosstalk (MDNEXT) loss
- 55.7.2.4.3 Multiple disturber power sum near-end crosstalk (PSNEXT) loss
- 55.7.2.4.4 Equal level far-end crosstalk (ELFEXT)
- 55.7.2.4.5 Multiple disturber equal level far-end crosstalk (MDELFEXT)
- 55.7.2.4.6 Multiple disturber power sum equal level far-end crosstalk (PS ELFEXT)
- 55.7.2.5 Maximum link delay
- 55.7.2.6 Link delay skew
- 55.7.3 Coupling parameters between link segments [Go to Page]
- 55.7.3.1 Multiple disturber alien near-end crosstalk (MDANEXT) loss [Go to Page]
- 55.7.3.1.1 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss
- 55.7.3.1.2 PSANEXT loss to insertion loss ratio requirements
- 55.7.3.2 Multiple disturber alien far-end crosstalk (MDAFEXT) loss [Go to Page]
- 55.7.3.2.1 Multiple disturber power sum alien equal level far-end crosstalk (PSAELFEXT)
- 55.7.3.2.2 PSAELFEXT to insertion loss ratio requirements
- 55.7.3.3 Alien crosstalk margin computation
- 55.7.4 Noise environment
- 55.8 MDI specification [Go to Page]
- 55.8.1 MDI connectors
- 55.8.2 MDI electrical specifications [Go to Page]
- 55.8.2.1 MDI return loss
- 55.8.2.2 MDI impedance balance
- 55.8.2.3 MDI fault tolerance
- 55.9 Environmental specifications [Go to Page]
- 55.9.1 General safety
- 55.9.2 Network safety
- 55.9.3 Installation and maintenance guidelines
- 55.9.4 Telephone voltages
- 55.9.5 Electromagnetic compatibility
- 55.9.6 Temperature and humidity
- 55.10 PHY labeling
- 55.11 Delay constraints
- 55.12 Protocol implementation conformance statement (PICS) proforma for Clause 55-Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10GBASE-T [Go to Page]
- 55.12.1 Identification [Go to Page]
- 55.12.1.1 Implementation identification
- 55.12.1.2 Protocol summary
- 55.12.2 Major capabilities/options
- 55.12.3 Physical Coding Sublayer (PCS) [Go to Page]
- 55.12.3.1 PCS Receive functions
- 55.12.3.2 Other PCS functions
- 55.12.4 Physical Medium Attachment (PMA)
- 55.12.5 Management interface
- 55.12.6 PMA Electrical Specifications
- 55.12.7 Characteristics of the link segment
- 55.12.8 MDI requirements
- 55.12.9 General safety and environmental requirements
- 55.12.10 Timing requirements
- Annex 55A (normative) LDPC details
- Annex 55B (informative) Additional cabling design guidelines for 10GBASE-T [Go to Page]
