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BS EN IEC 61784-3:2021 Industrial communication networks. Profiles - Functional safety fieldbuses. General rules and profile definitions, 2021
- undefined [Go to Page]
- Annex ZA(normative)Normative references to international publicationswith their corresponding European publications
- English [Go to Page]
- CONTENTS
- FOREWORD
- 0 Introduction [Go to Page]
- 0.1 General
- Figures [Go to Page]
- Figure 1 – Relationships of IEC 61784-3 with other standards (machinery)
- Figure 2 – Relationships of IEC 61784-3 with other standards (process)
- 0.2 Use of extended assessment methods in Edition 4
- 0.3 Patent declaration
- Figure 3 – Transitions from Ed. 2 to Ed. 4 and future Ed. 5 assessment methods
- 1 Scope
- 2 Normative references
- 3 Terms, definitions, symbols, abbreviated terms and conventions [Go to Page]
- 3.1 Terms and definitions
- 3.2 Symbols and abbreviated terms [Go to Page]
- 3.2.1 Abbreviated terms
- 3.2.2 Symbols
- 4 Conformance
- 5 Basics of safety-related fieldbus systems [Go to Page]
- 5.1 Safety function decomposition
- 5.2 Communication system [Go to Page]
- 5.2.1 General
- Figure 4 – Safety communication as a part of a safety function [Go to Page]
- 5.2.2 IEC 61158 fieldbuses
- 5.2.3 Communication channel types
- Figure 5 – Example model of a functional safety communication system [Go to Page]
- 5.2.4 Safety function response time
- 5.3 Communication errors [Go to Page]
- 5.3.1 General
- 5.3.2 Corruption
- Figure 6 – Example of safety function response time components [Go to Page]
- 5.3.3 Unintended repetition
- 5.3.4 Incorrect sequence
- 5.3.5 Loss
- 5.3.6 Unacceptable delay
- 5.3.7 Insertion
- 5.3.8 Masquerade
- 5.3.9 Addressing
- 5.4 Deterministic remedial measures [Go to Page]
- 5.4.1 General
- 5.4.2 Sequence number
- 5.4.3 Time stamp
- 5.4.4 Time expectation
- 5.4.5 Connection authentication
- 5.4.6 Feedback message
- 5.4.7 Data integrity assurance
- 5.4.8 Redundancy with cross checking
- 5.4.9 Different data integrity assurance systems
- 5.5 Typical relationships between errors and safety measures
- 5.6 Communication phases
- Tables [Go to Page]
- Table 1 – Overview of the effectiveness ofthe various measures on the possible errors
- 5.7 FSCP implementation aspects
- 5.8 Models for estimation of the total residual error rate [Go to Page]
- 5.8.1 Applicability
- Figure 7 – Conceptual FSCP protocol model
- Figure 8 – FSCP implementation aspects [Go to Page]
- 5.8.2 General models for black channel communications
- 5.8.3 Identification of generic safety properties
- Figure 9 – Black channel from an FSCP perspective [Go to Page]
- 5.8.4 Assumptions for residual error rate calculations
- 5.8.5 Residual error rates
- 5.8.6 Data integrity
- 5.8.7 Authenticity
- Figure 10 – Model for authentication considerations
- Figure 11 – Fieldbus and internal address errors [Go to Page]
- 5.8.8 Timeliness
- Figure 12 – Example of slowly increasing message latency
- Figure 13 – Example of an active network element failure [Go to Page]
- 5.8.9 Masquerade
- 5.8.10 Calculation of the total residual error rates
- Figure 14 – Example application 1 (m = 4)
- Figure 15 – Example application 2 (m = 2) [Go to Page]
- 5.8.11 Total residual error rate and SIL
- 5.8.12 Configuration and parameterization for an FSCP
- Table 2 – Typical relationship of residual error rate to SIL
- Table 3 – Typical relationship of residual error on demand to SIL
- Figure 16 – Example of configuration and parameterization procedures for FSCP
- 5.9 Relationship between functional safety and security
- 5.10 Boundary conditions and constraints [Go to Page]
- 5.10.1 Electrical safety
- 5.10.2 Electromagnetic compatibility (EMC)
- 5.11 Installation guidelines
- 5.12 Safety manual
- 5.13 Safety policy
- 6 Communication Profile Family 1 (Foundation™ Fieldbus) – Profiles for functional safety
- 7 Communication Profile Family 2 (CIP™) and Family 16 (SERCOS®) – Profiles for functional safety
- 8 Communication Profile Family 3 (PROFIBUS™, PROFINET™) – Profiles for functional safety
- 9 Communication Profile Family 6 (INTERBUS®) – Profiles for functional safety [Go to Page]
- Table 4 – Overview of profile identifier usable for FSCP 6/7
- 10 Communication Profile Family 8 (CC-Link™) – Profiles for functional safety [Go to Page]
- 10.1 Functional Safety Communication Profile 8/1
- 10.2 Functional Safety Communication Profile 8/2
- 11 Communication Profile Family 12 (EtherCAT™) – Profiles for functional safety
- 12 Communication Profile Family 13 (Ethernet POWERLINK™) – Profiles for functional safety
- 13 Communication Profile Family 14 (EPA®) – Profiles for functional safety
- 14 Communication Profile Family 17 (RAPIEnet™) – Profiles for functional safety
- 15 Communication Profile Family 18 (SafetyNET p™ Fieldbus) – Profiles for functional safety
- Annexes [Go to Page]
- Annex A (informative)Example functional safety communication models [Go to Page]
- A.1 General
- A.2 Model A (single message, channel and FAL, redundant SCLs)
- A.3 Model B (full redundancy)
- Figure A.1 – Model A [Go to Page]
- A.4 Model C (redundant messages, FALs and SCLs, single channel)
- A.5 Model D (redundant messages and SCLs, single channel and FAL)
- Figure A.2 – Model B
- Figure A.3 – Model C
- Figure A.4 – Model D
- Annex B (normative)Safety communication channel modelusing CRC-based error checking [Go to Page]
- B.1 Overview
- B.2 Channel model for calculations
- Figure B.1 – Binary symmetric channel (BSC) [Go to Page]
- B.3 Bit error probability Pe
- Figure B.2 – Block codes for error detection
- Table B.1 – Example dependency dmin and block bit length n [Go to Page]
- B.4 Cyclic redundancy checking [Go to Page]
- B.4.1 General
- B.4.2 Requirements for methods to calculate RCRC
- Figure B.3 – Example of a block with a message part and a CRC signature
- Figure B.4 – Proper and improper CRC polynomials
- Annex C (informative)Structure of technology-specific parts
- Table C.1 – Common subclause structure for technology-specific parts
- Annex D (informative)Assessment guideline [Go to Page]
- D.1 Overview
- D.2 Channel types [Go to Page]
- D.2.1 General
- D.2.2 Black channel
- D.2.3 White channel
- D.3 Data integrity considerations for white channel approaches [Go to Page]
- D.3.1 General
- D.3.2 Models B and C
- D.3.3 Models A and D
- D.4 Verification of safety measures [Go to Page]
- D.4.1 General
- Figure D.1 – Basic Markov model [Go to Page]
- [Go to Page]
- D.4.2 Implementation
- D.4.3 Default safety action
- D.4.4 Safe state
- D.4.5 Transmission errors
- D.4.6 Safety reaction and response times
- D.4.7 Combination of measures
- D.4.8 Absence of interference
- D.4.9 Additional fault causes (white channel)
- D.4.10 Reference test beds and operational conditions
- D.4.11 Conformance tester
- Annex E (informative)Examples of implicit vs. explicit FSCP safety measures [Go to Page]
- E.1 General
- E.2 Example fieldbus message with safety PDUs
- E.3 Model with completely explicit safety measures
- Figure E.1 – Example safety PDUs embedded in a fieldbus message
- Figure E.2 – Model with completely explicit safety measures [Go to Page]
- E.4 Model with explicit A-code and implicit T-code safety measures
- E.5 Model with explicit T-code and implicit A-code safety measures
- Figure E.3 – Model with explicit A-code and implicit T-code safety measures [Go to Page]
- E.6 Model with split explicit and implicit safety measures
- Figure E.4 – Model with explicit T-code and implicit A-code safety measures
- Figure E.5 – Model with split explicit and implicit safety measures [Go to Page]
- E.7 Model with completely implicit safety measures
- E.8 Addition to Annex B – impact of implicit codes on properness
- Figure E.6 – Model with completely implicit safety measures
- Annex F (informative)Legacy models for estimation of the total residual error rate [Go to Page]
- F.1 General
- F.2 Calculation of the residual error rate
- Figure F.1 – Example application 1 (m = 4)
- Table F.1 – Definition of items used for calculation of the residual error rates [Go to Page]
- F.3 Total residual error rate and SIL
- Figure F.2 – Example application 2 (m = 2)
- Table F.2 – Typical relationship of residual error rate to SIL
- Table F.3 – Typical relationship of residual error on demand to SIL
- Annex G (informative)Implicit data safety mechanisms for IEC 61784�3 functionalsafety communication profiles (FSCPs) [Go to Page]
- G.1 Overview
- G.2 Basic principles
- G.3 Problem statement: constant values for implicit data
- Figure G.1 – FSCP with implicit transmission of authenticityand/or timeliness codes
- Figure G.2 – Example of an incorrect transmission with multiple error causes
- Figure G.3 – Impact of errors in implicit data on the residual error probability [Go to Page]
- G.4 RP for FSCPs with random, uniformly distributed errimpl [Go to Page]
- G.4.1 General
- G.4.2 Uniform distribution within the interval [0;2i-1], i ≥ r
- G.4.3 Uniform distribution in the interval [1;2r-1], i = r
- G.5 General case
- G.6 Calculation of PID
- Annex H (informative)Residual error probability for example CRC codes(tables for verification of calculation methods) [Go to Page]
- H.1 Overview
- H.2 Example of a 32-bit CRC
- Table H.1 – Residual error probabilities (RCRC1) for example CRC32 polynomial
- Figure H.1 – Residual error probabilities (example of a 32-bit CRC – result 1)
- Figure H.2 – Residual error probabilities (example of a 32-bit CRC – result 2)
- Figure H.3 – Residual error probabilities (example of a 32-bit CRC – result 3)
- Figure H.4 – Residual error probabilities (example of a 32-bit CRC – result 4)
- Figure H.5 – Residual error probabilities (example of a 32-bit CRC – result 5)
- Figure H.6 – Residual error probabilities (example of a 32-bit CRC – result 6) [Go to Page]
- H.3 Example of a 16-bit CRC
- Table H.2 – Residual error probabilities (RCRC2) for example CRC16 polynomial
- Figure H.7 – Residual error probabilities (example of a 16-bit CRC – result 1)
- Figure H.8 – Residual error probabilities (example of a 16-bit CRC – result 2)
- Figure H.9 – Residual error probabilities (example of a 16-bit CRC – result 3)
- Figure H.10 – Residual error probabilities (example of a 16-bit CRC – result 4) [Go to Page]
- H.4 Conclusion
- Figure H.11 – Residual error probabilities (example of a 16-bit CRC – result 5)
- Figure H.12 – Example 1 of improper polynomial
- Figure H.13 – Example 2 of improper polynomial
- Bibliography [Go to Page]